
Hardware Description
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 2-24
ID062813 Non-Confidential
2.7 Clocks
This section describes the daughterboard clocks. It contains the following subsections.
• Overview of clocks
• Daughterboard programmable clock generators on page 2-27
• Test chip PLLs and clock divider logic on page 2-30
• External clocks on page 2-32.
2.7.1 Overview of clocks
The daughterboard sends clocks to, and receives clocks from, the motherboard and generates
local clocks that are imported into the Cortex-A15_A7 MPCore test chip. Additional PLLs
inside the test chip provide phase-shifted and frequency-multiplied versions of these imported
clocks as Figure 2-10 on page 2-26 shows.
Figure 2-9 on page 2-25 shows a functional overview of the CoreTile Express A15×2 A7×3
daughterboard clocks and their connections to the motherboard and a LogicTile Express FPGA
daughterboard.
Komentáře k této Příručce