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ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-50
ID062813 Non-Confidential
[12] PM_PERCORE_MBOX_ENABLE Recommends boot firmware or operating system action:
b0
Do not use per-core mailboxes for power
management.
b1
Use per-core mailboxes for power
management.
The default is
b1
.
Unless the operating system intervenes, the software stack
uses the Motherboard Express μATX SYS_FLAGS system
register to:
Power up the non-boot cores after the boot-core has
performed the necessary platform setup.
Distinguish between a warm reset and a cold reset.
Determine the common branch address for all cores
after a warm reset.
This bit has no direct effect but when it is
b1
it acts as a hint
from the operating system to the boot firmware to use the
per-core SPC mailbox registers to:
Distinguish between a warm reset, a cold reset and a
spurious reset of a core, possibly in conjunction with
another software-defined method. This includes the
ability to independently power up each non-boot core
after a cold reset.
Determine the branch address of a core after a warm
reset.
This enables the operating system to implement a full power
management system and ensure that the boot firmware
complies with that implementation.
See application note AN318, CoreTile
Express A15x2 A7x3
Power Management.
Table 3-28 Test chip CFGREG48 Register bit assignments (continued)
Bits Name Function
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1 2 ... 102 103 104 105 106 107 108 109 110 111 112 ... 177 178

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