
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. D-1
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Appendix D
Revisions
This appendix describes the technical changes between released issues of this book.
Table D-1 Issue A
Change Location Affects
First release - -
Table D-2 Difference between issue A and issue B
Change Location Affects
Deleted NIC-301 inside MPCore clusters. Figure 2-2 on page 2-4 All revisions
Changed description of Cortex-A15 L2 controller. Cortex-A15 L2 cache controller on page 3-54 All revisions
Added description of Cortex-A7 L2 controller. Cortex-A7 L2 cache controller on page 3-55 All revisions
Changed description of System Counter Control Registers. Table 3-43 on page 3-62 All revisions
Table D-3 Differences between issue B and issue C
Change Location Affects
Updated daughterboard memory map. Table 3-1 on page 3-5 All revisions
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