
Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-71
ID062813 Non-Confidential
Configurations Not applicable.
Attributes See Table 3-56 on page 3-69.
Figure 3-42 shows the bit assignments.
Figure 3-42 System counter CNTCVU Read Register bit assignments
Table 3-58 shows the bit assignments.
CNTFID0
The CNTFID0 Register characteristics are:
Purpose System counter base frequency ID read register that enables you to read
the counter frequency.
Usage constraints This register is read-only.
Configurations Not applicable.
Attributes See Table 3-56 on page 3-69.
Table 3-59 shows the bit assignments.
PID0
The PID0 Register characteristics are:
Purpose System counter peripheral identification read register 0 that enables you to
read peripheral identification information.
Usage constraints This register is read-only.
Configurations Not applicable.
Attributes See Table 3-56 on page 3-69.
Figure 3-43 on page 3-72 shows the bit assignments.
31 0
0 00000 0 000000000000 0000 000000 00
0
CNTCVU
Table 3-58 System counter CNTCVU Read Register bit assignments
Bits Name Function
[31:0] CNTCVU Current unencoded value of counter upper 32 bits, CNTCV[63:32].
The default is
0x0000_0000
.
Table 3-59 System counter CNTFID0 Read Register bit assignments
Bits Name Function
[31:0] CNTFID0 Counter frequency.
The default is
0x0000_0000
.
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