ARM ARM926EJ-S Specifikace stáhnout pdf (Strana 175)

Color LCD Controller (CLCDC)

Table 5-6 lists the register bit assignments.

Different synchronization rules apply to the Cursor Clip Registers than apply to the

cursor coordinates.

If CrsrFrameSync is 0, the cursor clip point is changed immediately, even if the cursor

is currently being scanned.

If CrsrFramesync is 1, the displayed cursor image is only changed during the vertical

frame blanking period, providing that the cursor position has been updated since the

Clip Register was programmed. Therefore, when programming, the Clip Register must

be written before the Position Register (ClcdCrsrXY) to ensure that in a given frame,

the clip and position information is coherent.

Cursor Interrupt Mask Set/Clear Register

The ClcdCrsrIMSC Register is read and write. It is used to enable the cursor interrupt

to the processor.

Figure 5-12 shows the register bit assignments.

Figure 5-12 ClcdCrsrIMSC Register bit assignments

Table 5-6 ClcdCrsrClip Register bit assignments

Bit Name Function

[31:14] - Reserved, read undefined, do not modify.

[13:8] CrsrClipY Distance from top of cursor image to the first displayed pixel in cursor.

When 0, the first displayed pixel is from the top line of the cursor image.

[7:6] - Reserved, read undefined, do not modify.

[5:0] CrsrClipX Distance from left edge of cursor image to the first displayed pixel of cursor.

When 0, the first pixel of the cursor line is displayed.

Undefined

31 10

CrsrIM

1 2 ... 170 171 172 173 174 175 176 177 178 179 180 ... 331 332

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ARM ARM926EJ-S Specifikace Strana 175