Arm VERSION 1.2 Uživatelský manuál stáhnout pdf (Strana 177)

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ARM Instruction Reference

4.7.5 LDC, STC

Transfer data between memory and coprocessor.

Syntax

These instructions have three possible forms:

• zero offset

• pre-indexed offset

• post-indexed offset.

The syntax of the three forms, in the same order, are:

op{cond}{L} coproc, CRd, [Rn]

op{cond}{L} coproc, CRd, [Rn, #{-}offset]{!}

op{cond}{L} coproc, CRd, [Rn], #{-}offset

where:

is either

LDC

STC

cond

is an optional condition code (see Conditional execution on page 4-4).

is an optional suffix specifying a long transfer.

coproc

is the name of the coprocessor the instruction is for. The standard name

, where

is an integer in the range 0-15.

CRd

is the coprocessor register to load or save.

is the register on which the memory address is based. If r15 is specified,

the value used is the address of the current instruction plus eight.

is an optional minus sign. If

is present, the offset is subtracted from

Otherwise, the offset is added to

offset

is an expression evaluating to a multiple of 4, in the range 0-1020.

is an optional suffix. If ! is present, the address including the offset is

written back into

Usage

The use of this instruction depends on the coprocessor. See the coprocessor

documentation for details.

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